[PATCH 06/11] clk: qcom: dispcc-qcs615: Add QCS615 display clock controller driver
Dmitry Baryshkov
dmitry.baryshkov at linaro.org
Thu Oct 31 08:12:53 PDT 2024
On Wed, 30 Oct 2024 at 19:59, Taniya Das <quic_tdas at quicinc.com> wrote:
>
>
>
> On 10/19/2024 1:55 AM, Dmitry Baryshkov wrote:
> >> #include "common.h"
> >> +#include "gdsc.h"
> >> +#include "reset.h"
> >> +
> >> +enum {
> >> + DT_BI_TCXO,
> >> + DT_GPLL0,
> >> + DT_DSI0_PHY_PLL_OUT_BYTECLK,
> >> + DT_DSI0_PHY_PLL_OUT_DSICLK,
> >> + DT_DSI1_PHY_PLL_OUT_DSICLK,
> > Is there a DSI 1 PLL on this platform?
>
> As per the design of the clock controller it has a DSI1 port.
It's just surprising to have the DSI1 DSICLK and not the BYTECLK. But
if you say so, it's fine.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
--
With best wishes
Dmitry
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