[PATCH v2 10/14] arm64: dts: rp1: Add support for RaspberryPi's RP1 device
Andrea della Porta
andrea.porta at suse.com
Sun Oct 27 06:26:59 PDT 2024
Hi Herve,
On 16:57 Mon 07 Oct , Herve Codina wrote:
> Hi Andrea,
>
> On Mon, 7 Oct 2024 14:39:53 +0200
> Andrea della Porta <andrea.porta at suse.com> wrote:
>
> > RaspberryPi RP1 is a multi function PCI endpoint device that
> > exposes several subperipherals via PCI BAR.
> > Add a dtb overlay that will be compiled into a binary blob
> > and linked in the RP1 driver.
> > This overlay offers just minimal support to represent the
> > RP1 device itself, the sub-peripherals will be added by
> > future patches.
> >
> > Signed-off-by: Andrea della Porta <andrea.porta at suse.com>
> > ---
>
> ...
> > +/ {
> > + fragment at 0 {
> > + target-path="";
> > + __overlay__ {
> > + compatible = "pci1de4,1";
>
> The compatible is not needed here. Indeed, it will be added by the PCI core
> when it scans the bus and adds the missing nodes.
> https://elixir.bootlin.com/linux/v6.12-rc2/source/drivers/pci/of_property.c#L383
Sure, but I've added it so that the dts could be validated.
>
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > +
> > + pci_ep_bus: pci-ep-bus at 1 {
> > + compatible = "simple-bus";
> > + ranges = <0xc0 0x40000000
> > + 0x01 0x00 0x00000000
> > + 0x00 0x00400000>;
> > + dma-ranges = <0x10 0x00000000
> > + 0x43000000 0x10 0x00000000
> > + 0x10 0x00000000>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + interrupt-controller;
> > + interrupt-parent = <&pci_ep_bus>;
> > + #interrupt-cells = <2>;
>
> Not sure this node should be an interrupt controller.
> The interrupt controller is the PCI device itself (i.e.the node
> where the overlay is applied).
Right.
Many thanks,
Andrea
>
> Best regards,
> Hervé
>
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