[PATCH v2 0/8] Initial support for SMMUv3 nested translation
Zhangfei Gao
zhangfei.gao at linaro.org
Wed Oct 16 18:53:22 PDT 2024
On Tue, 15 Oct 2024 at 21:09, Jason Gunthorpe <jgg at nvidia.com> wrote:
>
> On Tue, Oct 15, 2024 at 11:21:54AM +0800, Zhangfei Gao wrote:
> > On Thu, 12 Sept 2024 at 12:29, Baolu Lu <baolu.lu at linux.intel.com> wrote:
> >
> > > > Have you tested the user page fault?
> > > >
> > > > I got an issue, when a user page fault happens,
> > > > group->attach_handle = iommu_attach_handle_get(pasid)
> > > > return NULL.
> > > >
> > > > A bit confused here, only find IOMMU_NO_PASID is used when attaching
> > > >
> > > > __fault_domain_replace_dev
> > > > ret = iommu_replace_group_handle(idev->igroup->group, hwpt->domain,
> > > > &handle->handle);
> > > > curr = xa_store(&group->pasid_array, IOMMU_NO_PASID, handle, GFP_KERNEL);
> > > >
> > > > not find where the code attach user pasid with the attach_handle.
> > >
> > > Have you set iommu_ops::user_pasid_table for SMMUv3 driver?
> >
> > Thanks Baolu
> >
> > Can we send a patch to make it as default?
> >
> > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > @@ -3570,6 +3570,7 @@ static struct iommu_ops arm_smmu_ops = {
> > .viommu_alloc = arm_vsmmu_alloc,
> > .pgsize_bitmap = -1UL, /* Restricted during device attach */
> > .owner = THIS_MODULE,
> > + .user_pasid_table = 1,
>
> You shouldn't need this right now as smmu3 doesn't support nesting
> domains yet.
I am testing with .user_pasid_table = 1 and IOMMU_NO_PASID
It works for user page faults.
>
> if (!ops->user_pasid_table)
> return NULL;
> /*
> * The iommu driver for this device supports user-
> * managed PASID table. Therefore page faults for
> * any PASID should go through the NESTING domain
> * attached to the device RID.
> */
> attach_handle = iommu_attach_handle_get(
> dev->iommu_group, IOMMU_NO_PASID,
> IOMMU_DOMAIN_NESTED);
> if (IS_ERR(attach_handle))
> ^^^^^^^^^^^^^^^^^^^^^ Will always fail
>
>
> But I will add it to the patch that adds IOMMU_DOMAIN_NESTED
OK, cool.
Thanks
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