[PATCH v4 1/7] arm64: head.S: Initialise MPAM EL2 registers and disable traps

[Gavin Shan]

On 10/4/24 9:07 PM, Joey Gouly wrote:
> From: James Morse <james.morse at arm.com>
> 
> Add code to head.S's el2_setup to detect MPAM and disable any EL2 traps.
> This register resets to an unknown value, setting it to the default
> parititons/pmg before we enable the MMU is the best thing to do.
> 
> Kexec/kdump will depend on this if the previous kernel left the CPU
> configured with a restrictive configuration.
> 
> If linux is booted at the highest implemented exception level el2_setup
> will clear the enable bit, disabling MPAM.
> 
> This code can't be enabled until a subsequent patch adds the Kconfig
> and cpufeature boiler plate.
> 
> Signed-off-by: James Morse <james.morse at arm.com>
> Signed-off-by: Joey Gouly <joey.gouly at arm.com>
> ---
>   arch/arm64/include/asm/el2_setup.h | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
> index e0ffdf13a18b..2a84a3d05834 100644
> --- a/arch/arm64/include/asm/el2_setup.h
> +++ b/arch/arm64/include/asm/el2_setup.h
> @@ -220,6 +220,21 @@
>   	msr	spsr_el2, x0
>   .endm
>   
> +.macro __init_el2_mpam
> +#ifdef CONFIG_ARM64_MPAM
> +	/* Memory Partitioning And Monitoring: disable EL2 traps */
> +	mrs	x1, id_aa64pfr0_el1
> +	ubfx	x0, x1, #ID_AA64PFR0_EL1_MPAM_SHIFT, #4
> +	cbz	x0, .Lskip_mpam_\@		// skip if no MPAM
> +	msr_s	SYS_MPAM2_EL2, xzr		// use the default partition
> +						// and disable lower traps
> +	mrs_s	x0, SYS_MPAMIDR_EL1
> +	tbz	x0, #17, .Lskip_mpam_\@		// skip if no MPAMHCR reg
> +	msr_s	SYS_MPAMHCR_EL2, xzr		// clear TRAP_MPAMIDR_EL1 -> EL2
> +.Lskip_mpam_\@:
> +#endif /* CONFIG_ARM64_MPAM */
> +.endm
> +

Bit#17 has been defined as SYS_MPAMIDR_EL1_HAS_HCR_SHIFT in PATCH[v4 2/7]. The
definition can be used if PATCH#1 and PATCH#2 are swapped.

     tbz    x0, #SYS_MPAMIDR_EL1_HAS_HCR_SHIFT, .Lskip_mpam_\@	// skip if no MPAMHCR

>   /**
>    * Initialize EL2 registers to sane values. This should be called early on all
>    * cores that were booted in EL2. Note that everything gets initialised as
> @@ -237,6 +252,7 @@
>   	__init_el2_stage2
>   	__init_el2_gicv3
>   	__init_el2_hstr
> +	__init_el2_mpam
>   	__init_el2_nvhe_idregs
>   	__init_el2_cptr
>   	__init_el2_fgt

Thanks,
Gavin