[PATCH] arm64: Fix sve_vl() for build errors

[Suzuki K Poulose]

commit 5b9895f8a5d9 ("arm: Fix clang error in sve_vl()") breaks the build
with the following compiler version, as the "rdvl" expects a 64bit register.

/tmp/ccGJYtuC.s: Assembler messages:
/tmp/ccGJYtuC.s:2165: Error: operand mismatch -- `rdvl w3,#8'
/tmp/ccGJYtuC.s:2165: Info:    did you mean this?
/tmp/ccGJYtuC.s:2165: Info:     rdvl x3, #8
make: *** [<builtin>: arm/selftest.o] Error 1
make: *** Waiting for unfinished jobs....

$ aarch64-none-elf-gcc --version
aarch64-none-elf-gcc (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16)) 10.2.1 20201103

Fix this by switching to use "unsigned long" variable and restoring the 64bit
register for the instruction

Fixes: 5b9895f8a5d9 ("arm: Fix clang error in sve_vl()")
Cc: Raghavendra Rao Ananta <rananta at google.com>
Cc: Andrew Jones <andrew.jones at linux.dev>
Signed-off-by: Suzuki K Poulose <suzuki.poulose at arm.com>
---
 lib/arm64/asm/processor.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
index e261e74d..e5b0ad10 100644
--- a/lib/arm64/asm/processor.h
+++ b/lib/arm64/asm/processor.h
@@ -154,12 +154,12 @@ static inline bool system_supports_sve(void)
 	return ((get_id_aa64pfr0_el1() >> ID_AA64PFR0_EL1_SVE_SHIFT) & 0xf) != 0;
 }
 
-static inline int sve_vl(void)
+static inline unsigned long sve_vl(void)
 {
-	int vl;
+	unsigned long vl;
 
 	asm volatile(".arch_extension sve\n"
-		     "rdvl %w0, #8"
+		     "rdvl %x0, #8"
 		     : "=r" (vl));
 
 	return vl;
-- 
2.34.1