[PATCH 1/3] dt-bindings: drm/bridge: ti-sn65dsi83: Add optional property ti,lvds-vcom
Andrej Picej
andrej.picej at norik.com
Thu Nov 28 00:46:33 PST 2024
Hi Rob,
On 27. 11. 24 16:16, Rob Herring wrote:
> On Wed, Nov 27, 2024 at 11:30:29AM +0100, Andrej Picej wrote:
>> From: Janine Hagemann <j.hagemann at phytec.de>
>>
>> Add an optional property to change LVDS output voltage. This depends on
>> the connected display specifications. With this property we directly set
>> the LVDS_VCOM (0x19) register.
>> Better register property mapping would be quite tricky. Please check
>> bridge's datasheet for details on how register values set the LVDS
>> data lines and LVDS clock output voltage.
>>
>> Signed-off-by: Janine Hagemann <j.hagemann at phytec.de>
>> Signed-off-by: Andrej Picej <andrej.picej at norik.com>
>> ---
>> .../bindings/display/bridge/ti,sn65dsi83.yaml | 14 +++++++++++++-
>> 1 file changed, 13 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
>> index 48a97bb3e2e0..5b2c0c281824 100644
>> --- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
>> +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
>> @@ -58,6 +58,12 @@ properties:
>> - const: 2
>> - const: 3
>> - const: 4
>> + ti,lvds-vcom:
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + description: LVDS output voltage configuration. This defines
>> + LVDS_VCOM (0x19) register value. Check bridge's datasheet for
>> + details on how register values set the LVDS data lines and
>> + LVDS clock output voltage.
>
> Constraints? 0 - 2^32 are all valid values?
Not really, only first 6 bits, which also means that this can be uint8
then. Will fix with other issues.
>
>>
>> port at 1:
>> $ref: /schemas/graph.yaml#/$defs/port-base
>> @@ -78,6 +84,12 @@ properties:
>> - const: 2
>> - const: 3
>> - const: 4
>> + ti,lvds-vcom:
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + description: LVDS output voltage configuration. This defines
>> + LVDS_VCOM (0x19) register value. Check bridge's datasheet for
>> + details on how register values set the LVDS data lines and
>> + LVDS clock output voltage.
>
> Never good to just have 2 copies of the same thing. Move the whole port
> schema to a $defs entry and add the property there. Then just $ref it:
>
> port at 0:
> description: Video port for MIPI DSI Channel-A input
> $ref: '#/$defs/dsi-port'
>
>
> $defs:
> dsi-port:
> $ref: /schemas/graph.yaml#/$defs/port-base
> unevaluatedProperties: false
> description: Video port for MIPI DSI inputs
>
> properties:
> endpoint:
> $ref: /schemas/media/video-interfaces.yaml#
> unevaluatedProperties: false
>
> properties:
> data-lanes:
> description: array of physical DSI data lane indexes.
> minItems: 1
> items:
> - const: 1
> - const: 2
> - const: 3
> - const: 4
>
Ok will do it like this + just noticed that we are adding this under
MIPI DSI port, and not LVDS output port for which these property is
meant for. Will move it there.
Thanks. Best regards,
Andrej
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