[PATCH v12 1/8] dt-bindings: media: platform: visconti: Add Toshiba Visconti MIPI CSI-2 Receiver
Yuji Ishikawa
yuji2.ishikawa at toshiba.co.jp
Mon Nov 25 01:21:39 PST 2024
Adds the Device Tree binding documentation that allows to describe
the MIPI CSI-2 Receiver found in Toshiba Visconti SoCs.
Signed-off-by: Yuji Ishikawa <yuji2.ishikawa at toshiba.co.jp>
Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu at toshiba.co.jp>
---
Changelog v12:
- Newly add bindings for CSI2RX driver
.../media/toshiba,visconti5-csi2rx.yaml | 104 ++++++++++++++++++
1 file changed, 104 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/toshiba,visconti5-csi2rx.yaml
diff --git a/Documentation/devicetree/bindings/media/toshiba,visconti5-csi2rx.yaml b/Documentation/devicetree/bindings/media/toshiba,visconti5-csi2rx.yaml
new file mode 100644
index 000000000000..5488072bc82a
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/toshiba,visconti5-csi2rx.yaml
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/toshiba,visconti5-csi2rx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba Visconti5 SoC MIPI CSI-2 receiver
+
+maintainers:
+ - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu at toshiba.co.jp>
+
+description: |-
+ Toshiba Visconti5 SoC MIPI CSI-2 receiver device receives MIPI CSI-2 video
+ stream. Use with VIIF device. T.B.D
+
+properties:
+ compatible:
+ const: toshiba,visconti5-csi2rx
+
+ reg:
+ items:
+ - description: Registers for CSI2 receiver control
+
+ interrupts:
+ items:
+ - description: CSI2 Receiver Interrupt
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port at 0:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description:
+ Input port node, single endpoint describing the CSI-2 transmitter.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ description: CSI2 receiver supports 1, 2, 3 or 4 data lanes
+ minItems: 1
+ items:
+ - const: 1
+ - const: 2
+ - const: 3
+ - const: 4
+ required:
+ - data-lanes
+
+ port at 1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description:
+ Output port node, single endpoint describing the Visconti VIIF.
+
+ required:
+ - port at 0
+ - port at 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ csi2rx at 1c008000 {
+ compatible = "toshiba,visconti5-csi2rx";
+ reg = <0 0x1c008000 0 0x400>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 {
+ reg = <0>;
+ csi2rx_in0: endpoint {
+ data-lanes = <1 2>;
+ remote-endpoint = <&imx219_out0>;
+ };
+ };
+ port at 1 {
+ reg = <1>;
+ csi2rx_out0: endpoint {
+ remote-endpoint = <&csi_in0>;
+ };
+ };
+ };
+ };
+ };
--
2.25.1
More information about the linux-arm-kernel
mailing list