[PATCH RFC net-next v6 01/15] net: driver: stmmac: Fix CSR divider comment
Jan Petrous via B4 Relay
devnull+jan.petrous.oss.nxp.com at kernel.org
Sun Nov 24 14:42:32 PST 2024
From: "Jan Petrous (OSS)" <jan.petrous at oss.nxp.com>
The comment in declaration of STMMAC_CSR_250_300M
incorrectly describes the constant as '/* MDC = clk_scr_i/122 */'
but the DWC Ether QOS Handbook version 5.20a says it is
CSR clock/124.
Signed-off-by: Jan Petrous (OSS) <jan.petrous at oss.nxp.com>
Reviewed-by: Jacob Keller <jacob.e.keller at intel.com>
---
include/linux/stmmac.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index d79ff252cfdc..75cbfb576358 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -33,7 +33,7 @@
#define STMMAC_CSR_20_35M 0x2 /* MDC = clk_scr_i/16 */
#define STMMAC_CSR_35_60M 0x3 /* MDC = clk_scr_i/26 */
#define STMMAC_CSR_150_250M 0x4 /* MDC = clk_scr_i/102 */
-#define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/122 */
+#define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/124 */
/* MTL algorithms identifiers */
#define MTL_TX_ALGORITHM_WRR 0x0
--
2.47.0
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