[PATCH net-next 1/2] dt-bindings: net: xlnx,axi-ethernet: Add bindings for AXI 2.5G MAC

Andrew Lunn andrew at lunn.ch
Tue Nov 19 05:38:23 PST 2024


> > Do you mean 2.5G is a synthesis option? Or are you saying it has always been able
> > to do 2.5G, but nobody has added the needed code?
> > 
> > This is a pretty unusual use of max-speed, so i would like to fully understand why it
> > is being used before allowing it.
> > 
> >         Andrew
> 

> 2.5G support was already there in hardware, driver is getting
> upstream now. 1G or 2.5G configuration needs to be selected before
> synthesis. In 2.5G configuration it supports only 2.5G speed.

So when the PCS is fixed to 2.5G, are you planning on using rate
adaptation to support lower speeds? There are a few systems doing
this, mostly by using pause frames between the PHY and the MAC.

> I'm exploring registers to get 1G / 2.5G selections information
> instead of using max-speed. Will send next series soon.

That would be best. The PCS might itself report its
capabilities. Sometimes there is the equivalent of the BMSR.

> Just for my understanding, could you please share the use of
> max-speed DT property if possible?

It is generally used to remove higher speed operation because they are
broken for a particular board. It should be considered a board
property, not a SoC property.

	Andrew



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