cacheflush completely broken, suspecting PAN+LPAE
Michał Pecio
michal.pecio at gmail.com
Tue Nov 12 02:45:56 PST 2024
Hi,
On Tue, 12 Nov 2024 10:21:36 +0000, Russell King (Oracle) wrote:
> On Mon, Nov 11, 2024 at 11:38:17PM +0100, Michał Pecio wrote:
> > Hi,
> > So I guess it looks like there is a problem with this feature,
> > perhaps a missing "permit user accesss" somewhere?
>
> That's exactly the reason - user access needs to be enabled before
> calling flush_icache_user_range() so that the cache operation
> instructions don't fault. The patch below should fix this.
Thanks, I will test it later this day.
By the way, do you know why it wasn't broken without LPAE? It looks
like either those specific coprocessor operations somehow bypass the
protection, or maybe all of PAN is a big, expensive no-op...
> Please ensure that you copy me with ARM related bugs in future.
OK, will do.
Regards,
Michal
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