[PATCH v4 1/4] dt-bindings: rtc: add schema for NXP S32G2/S32G3 SoCs

[Ciprian Marian Costea]

On 11/11/2024 5:14 PM, Frank Li wrote:
> On Mon, Nov 11, 2024 at 03:59:37PM +0200, Ciprian Costea wrote:
>> From: Ciprian Marian Costea <ciprianmarian.costea at oss.nxp.com>
>>
>> RTC tracks clock time during system suspend and it is used as a wakeup
>> source on S32G2/S32G3 architecture.
>>
>> RTC from S32G2/S32G3 is not battery-powered and it is not kept alive
>> during system reset.
>>
>> Co-developed-by: Bogdan-Gabriel Roman <bogdan-gabriel.roman at nxp.com>
>> Signed-off-by: Bogdan-Gabriel Roman <bogdan-gabriel.roman at nxp.com>
>> Co-developed-by: Ghennadi Procopciuc <ghennadi.procopciuc at nxp.com>
>> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc at nxp.com>
>> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea at oss.nxp.com>
>> ---
>>   .../devicetree/bindings/rtc/nxp,s32g-rtc.yaml | 78 +++++++++++++++++++
>>   1 file changed, 78 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml b/Documentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml
>> new file mode 100644
>> index 000000000000..231811579e1b
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml
>> @@ -0,0 +1,78 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/rtc/nxp,s32g-rtc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: NXP S32G2/S32G3 Real Time Clock (RTC)
>> +
>> +maintainers:
>> +  - Bogdan Hamciuc <bogdan.hamciuc at nxp.com>
>> +  - Ciprian Marian Costea <ciprianmarian.costea at nxp.com>
>> +
>> +description:
>> +  RTC hardware module present on S32G2/S32G3 SoCs is used as a wakeup
>> +  source. It is not kept alive during system reset and it is not
>> +  battery-powered.
>> +
>> +  RTC hardware module contains a hardware mux with 4 entries/inputs
>> +  for clock source selection. On S32G2/S32G3 SoCs, this mux is used
>> +  to select between a clock source for runtime which brings more
>> +  precision but is not available during system standby, and a clock
>> +  source for suspend state.
>> +
>> +properties:
>> +  compatible:
>> +    oneOf:
>> +      - enum:
>> +          - nxp,s32g2-rtc
>> +      - items:
>> +          - const: nxp,s32g3-rtc
>> +          - const: nxp,s32g2-rtc
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  interrupts:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    minItems: 2
>> +    items:
>> +      - description: ipg clock drives the access to the
>> +          RTC iomapped registers
>> +      - description: Runtime clock source. It must be a clock
>> +          source for the RTC module. It will be disabled by hardware
>> +          during Standby/Suspend.
>> +      - description: Standby/Suspend clock source. It is optional
>> +          and can be used in case the RTC will continue ticking during
>> +          platform/system suspend.
> 
> wrap at 80, keep wrap pos consisent in this file.
> 

Hello Frank,

Thanks for your review.
I will update wrapping to 80 characters in V5.

>> +
>> +  clock-names:
>> +    minItems: 2
>> +    maxItems: 3
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - interrupts
>> +  - clocks
>> +  - clock-names
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +    #include <dt-bindings/interrupt-controller/irq.h>
>> +
>> +    rtc at 40060000 {
>> +        compatible = "nxp,s32g3-rtc",
>> +                   "nxp,s32g2-rtc";
> 
> align to previous line "
> 

I will update this alignment in V5.

>> +        reg = <0x40060000 0x1000>;
>> +        interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
>> +        clocks = <&clks 54>, <&clks 56>, <&clks 55>;
>> +        clock-names = "ipg",
>> +            "rtc_runtime_s2",
>> +            "rtc_standby_s0";
> 
> align to previous line "

I will update this alignment in V5.


Best Regards,
Ciprian

> 
>> +    };
>> --
>> 2.45.2
>>