[PATCH v4 3/5] arm64: Add support for FEAT_HAFT
Catalin Marinas
catalin.marinas at arm.com
Mon Nov 4 09:28:48 PST 2024
On Sat, Nov 02, 2024 at 06:42:33PM +0800, Yicong Yang wrote:
> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> index 3d261cc123c1..ed8c784ca082 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -838,6 +838,12 @@ static inline bool system_supports_poe(void)
> alternative_has_cap_unlikely(ARM64_HAS_S1POE);
> }
>
> +static inline bool system_supports_haft(void)
> +{
> + return IS_ENABLED(CONFIG_ARM64_HAFT) &&
> + cpus_have_final_cap(ARM64_HAFT);
> +}
I'm fine with this approach. If we ever get hardware with mismatched
FEAT_HAFT and some secondary CPUs don't come up, we can revisit.
> diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
> index ccbae4525891..0bc88df7cb35 100644
> --- a/arch/arm64/mm/proc.S
> +++ b/arch/arm64/mm/proc.S
> @@ -498,6 +498,10 @@ alternative_else_nop_endif
> and x9, x9, ID_AA64MMFR1_EL1_HAFDBS_MASK
> cbz x9, 1f
> orr tcr, tcr, #TCR_HA // hardware Access flag update
> +
> +#ifdef CONFIG_ARM64_HAFT
> + orr tcr2, tcr2, TCR2_EL1x_HAFT
> +#endif /* CONFIG_ARM64_HAFT */
> 1:
> #endif /* CONFIG_ARM64_HW_AFDBM */
> msr mair_el1, mair
If you still want #ifdefs, I'd have left it outside the HW_AFDBM. We
already have a dependency in the Kconfig. Anyway, I can fix this up.
I think as an additional patch we can also remove the ID checks for the
tcr bit in tge HW_AFDBM case. But that's unrelated to this series.
--
Catalin
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