[PATCH V3 0/2] iommu/arm-smmu-v3: Add support for ECMDQ register mode

[Tanmay Jagdale]

Hi Will,

On Tue, Apr 30, 2024 at 04:09:50PM +0100, Will Deacon wrote:
> On Thu, Apr 25, 2024 at 07:41:50AM -0700, Tanmay Jagdale wrote:
> > Resending the patches by Zhen Lei <thunder.leizhen at huawei.com> that add
> > support for SMMU ECMDQ feature.
> > 
> > Tested this feature on a Marvell SoC by implementing a smmu-test driver.
> > This test driver spawns a thread per CPU and each thread keeps sending
> > map, table-walk and unmap requests for a fixed duration.
> > 
> > Using this test driver, we compared ECMDQ vs SMMU with software batching
> > support and saw ~5% improvement with ECMDQ. Performance numbers are
> > mentioned below:
> > 
> >                    Total Requests  Average Requests  Difference
> >                                       Per CPU         wrt ECMDQ
> > -----------------------------------------------------------------
> > ECMDQ                 239286381       2991079
> > CMDQ Batch Size 1     228232187       2852902         -4.62%
> > CMDQ Batch Size 32    233465784       2918322         -2.43%
> > CMDQ Batch Size 64    231679588       2895994         -3.18%
> > CMDQ Batch Size 128   233189030       2914862         -2.55%
> > CMDQ Batch Size 256   230965773       2887072         -3.48%
> 
> These are pretty small improvements in a targetted micro-benchmark. Do
> you have any real-world numbers showing that this is worthwhile? For
> example, running something like netperf.
We are running benchmarks on the latest kernel with and without ECMDQ.
We will share the performance numbers and observations here.

With Regards,
Tanmay
> 
> Will
> 
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