[PATCH v5 11/17] riscv: csr: Add CSR encodings for VCSR_VXRM/VCSR_VXSAT
Charlie Jenkins
charlie at rivosinc.com
Thu May 2 21:46:46 PDT 2024
The VXRM vector csr for xtheadvector has an encoding of 0xa and VXSAT
has an encoding of 0x9.
Co-developed-by: Heiko Stuebner <heiko at sntech.de>
Signed-off-by: Charlie Jenkins <charlie at rivosinc.com>
---
arch/riscv/include/asm/csr.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 13bc99c995d1..e5a35efd56e0 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -219,6 +219,8 @@
#define VCSR_VXRM_MASK 3
#define VCSR_VXRM_SHIFT 1
#define VCSR_VXSAT_MASK 1
+#define VCSR_VXSAT 0x9
+#define VCSR_VXRM 0xa
/* symbolic CSR names: */
#define CSR_CYCLE 0xc00
--
2.44.0
More information about the linux-arm-kernel
mailing list