[PATCH v5 11/27] iommu/arm-smmu-v3: Build the whole CD in arm_smmu_make_s1_cd()

[Jason Gunthorpe]

On Fri, Mar 15, 2024 at 06:04:19PM +0800, Michael Shavit wrote:
> > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > index 50d17e3ce0a956..dfdd48cf217c4e 100644
> > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > @@ -1301,15 +1301,25 @@ void arm_smmu_make_s1_cd(struct arm_smmu_cd *target,
> >                          struct arm_smmu_domain *smmu_domain)
> >  {
> >         struct arm_smmu_ctx_desc *cd = &smmu_domain->cd;
> > +       const struct io_pgtable_cfg *pgtbl_cfg =
> > +               &io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops)->cfg;
> > +       typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr =
> > +               &pgtbl_cfg->arm_lpae_s1_cfg.tcr;
> >
> >         memset(target, 0, sizeof(*target));
> >
> >         target->data[0] = cpu_to_le64(
> > -               cd->tcr |
> > +               FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, tcr->tsz) |
> > +               FIELD_PREP(CTXDESC_CD_0_TCR_TG0, tcr->tg) |
> > +               FIELD_PREP(CTXDESC_CD_0_TCR_IRGN0, tcr->irgn) |
> > +               FIELD_PREP(CTXDESC_CD_0_TCR_ORGN0, tcr->orgn) |
> > +               FIELD_PREP(CTXDESC_CD_0_TCR_SH0, tcr->sh) |
> > +               CTXDESC_CD_0_TCR_EPD1 |
> >  #ifdef __BIG_ENDIAN
> >                 CTXDESC_CD_0_ENDI |
> >  #endif
> >                 CTXDESC_CD_0_V |
> > +               FIELD_PREP(CTXDESC_CD_0_TCR_IPS, tcr->ips) |
> 
> I guess you're trying to keep these ordered by bit position, in which
> case EPD1 should go after ENDI.

Right, I missed the #defines are not in bit order :\

Thanks,
Jason