[PATCH] arm64: dts: rockchip: Add cache information to the SoC dtsi for RK356x

Diederik de Haas didi.debian at cknow.org
Fri Mar 8 14:48:18 PST 2024


On Sunday, 3 March 2024 20:04:50 CET Dragan Simic wrote:
> Add missing cache information to the Rockchip RK356x SoC dtsi, to allow
> the userspace, which includes /proc/cpuinfo and lscpu(1), to present proper
> RK3566 and RK3568 cache information.  Also, it gets rid of the following
> error in the kernel log:
> 
>   cacheinfo: Unable to detect cache hierarchy for CPU 0

I tried it out on my PineTab2 (rk3566) and while I didn't see any change in 
`/proc/cpuinfo`, I did see a/the change in `lscpu` and the above quoted 
warning is now gone. Thanks :-)

Tested-By: Diederik de Haas <didi.debian at cknow.org>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 228 bytes
Desc: This is a digitally signed message part.
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20240308/4a296077/attachment.sig>


More information about the linux-arm-kernel mailing list