[PATCH v1 3/3] spi: xilinx: Make num_chipselect 8-bit in the struct xspi_platform_data
Michal Simek
michal.simek at amd.com
Fri Mar 8 06:00:55 PST 2024
On 3/8/24 14:55, Andy Shevchenko wrote:
> On Fri, Mar 08, 2024 at 02:48:04PM +0100, Michal Simek wrote:
>> On 3/8/24 14:31, Andy Shevchenko wrote:
>>> On Fri, Mar 08, 2024 at 09:20:23AM +0100, Michal Simek wrote:
>>>> On 3/7/24 16:43, Andy Shevchenko wrote:
>
> ...
>
>>>>> struct xspi_platform_data {
>>>>> - u16 num_chipselect;
>>>>> - u8 bits_per_word;
>>>>> - struct spi_board_info *devices;
>>>>> - u8 num_devices;
>>>>> bool force_irq;
>>>>> + u8 num_chipselect;
>>>>> + u8 bits_per_word;
>>>>> + u8 num_devices;
>>>>
>>>> all above have 32bits. It means on 64bit cpu you have 32bit gap here.
>>>
>>>>> + struct spi_board_info *devices;
>>>
>>> On all architectures? I mean do all 64-bit architecture ABIs _require_
>>> the pointer to be aligned at 8-byte boundary? Even if so, the struct
>>> itself can be aligned on 4-byte boundary.
>>
>> I am not able to tell if toolchain enforce 8byte alignment by default/by
>> setup on all 64bit systems.
>> I am using pahole to check this which was recommended by Greg in past which
>> reports gap in the middle.
>
> I see, thanks for explanation.
>
> Yes, it's likely that in some cases it will be a gap on 64-bit platforms, but
> after this patch no gap on 32-bit. Do you still want me to reshuffle that as
> you suggested?
Yes I would prefer to do that change when you are doing cleanup.
M
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