[PATCH v1 3/3] spi: xilinx: Make num_chipselect 8-bit in the struct xspi_platform_data
Michal Simek
michal.simek at amd.com
Fri Mar 8 00:20:23 PST 2024
On 3/7/24 16:43, Andy Shevchenko wrote:
> There is no use for whole 16-bit for the number of chip select pins.
> Drop it to 8 bits and reshuffle the data structure layout to avoid
> unnecessary paddings.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>
> ---
> include/linux/spi/xilinx_spi.h | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/include/linux/spi/xilinx_spi.h b/include/linux/spi/xilinx_spi.h
> index 4ba8f53ce570..a638ba2a55bd 100644
> --- a/include/linux/spi/xilinx_spi.h
> +++ b/include/linux/spi/xilinx_spi.h
> @@ -8,18 +8,18 @@ struct spi_board_info;
>
> /**
> * struct xspi_platform_data - Platform data of the Xilinx SPI driver
> + * @force_irq: If set, forces QSPI transaction requirements.
> * @num_chipselect: Number of chip select by the IP.
> * @bits_per_word: Number of bits per word.
> - * @devices: Devices to add when the driver is probed.
> * @num_devices: Number of devices in the devices array.
> - * @force_irq: If set, forces QSPI transaction requirements.
> + * @devices: Devices to add when the driver is probed.
> */
> struct xspi_platform_data {
> - u16 num_chipselect;
> - u8 bits_per_word;
> - struct spi_board_info *devices;
> - u8 num_devices;
> bool force_irq;
> + u8 num_chipselect;
> + u8 bits_per_word;
> + u8 num_devices;
all above have 32bits. It means on 64bit cpu you have 32bit gap here.
> + struct spi_board_info *devices;
It means this should be like this and then there is no gap between on
32bit/64bit systems.
struct xspi_platform_data {
struct spi_board_info * devices; /* 0 8 */
bool force_irq; /* 8 1 */
u8 num_chipselect; /* 9 1 */
u8 bits_per_word; /* 10 1 */
u8 num_devices; /* 11 1 */
/* size: 16, cachelines: 1, members: 5 */
/* padding: 4 */
/* last cacheline: 16 bytes */
};
Thanks,
Michal
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