[PATCH v3 1/2] dt-bindindgs: clock: support NXP i.MX95 BLK CTL module
Peng Fan
peng.fan at nxp.com
Mon Mar 4 23:18:38 PST 2024
> Subject: Re: [PATCH v3 1/2] dt-bindindgs: clock: support NXP i.MX95 BLK CTL
> module
>
> On 05/03/2024 05:13, Peng Fan wrote:
> >>> +
> >>> +examples:
> >>> + # Clock Control Module node:
> >>> + - |
> >>> + #include <dt-bindings/clock/nxp,imx95-clock.h>
> >>> +
> >>> + syscon at 4c410000 {
> >>
> >> clock-controller at ...
> >
> > But this is a syscon, using clock-controller will trigger dt check
> > warning.
>
> Which warning?
I just recalled that node with syscon in compatible string needs
has syscon as node, I maybe wrong.
>
> >>
> >> As that is the main feature/function.
> >>
> >>> + compatible = "nxp,imx95-vpumix-csr", "syscon";
> >>> + reg = <0x4c410000 0x10000>;
> >>> + #clock-cells = <1>;
> >>
> >> Please make the example as full as possible. For example, add
> >> mux-controller node. Do some of the blocks not have mux ctrl?
> >
> > Yes. The blk ctrl is not just for clock, some registers has mux ctrl,
> > such as Pixel_link_sel.
>
> Then mux-controller should not be allowed for them.
You mean I should not add mux-controller under the blk ctrl node?
We have such a node in downstream tree, if mux-controller is
not allowed, would you please suggest other approaches?
display_master_csr: syscon at 4ad10000 {
compatible = "fsl,imx95-display-master-csr", "syscon";
reg = <0x0 0x4ad10000 0x0 0x10000>;
#clock-cells = <1>;
clocks = <&scmi_clk IMX95_CLK_CAMAPB>;
power-domains = <&scmi_devpd IMX95_PD_CAMERA>;
mux: mux-controller {
compatible = "mmio-mux";
#mux-control-cells = <1>;
mux-reg-masks = <0x4 0x00000001>; /* Pixel_link_sel */
idle-states = <0>;
};
};
Thanks,
Peng.
>
> Best regards,
> Krzysztof
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