[PATCH v2 0/4] PAN for ARM32 using LPAE

[Linus Walleij]

On Wed, Feb 21, 2024 at 12:04 AM Linus Walleij <linus.walleij at linaro.org> wrote:

> This is a patch set from Catalin that ended up on the back burner.
>
> Since LPAE systems, i.e. ARM32 systems with a lot of physical memory,
> will be with us for a while more, this is a pretty straight-forward
> hardening measure that we should support.
>
> The last patch explains the mechanism: since PAN using CPU domains
> isn't available when using the LPAE MMU tables, we use the split
> between the two translation base tables instead: TTBR0 is for
> userspace pages and TTBR1 is for kernelspace tables. When executing
> in kernelspace: we protect userspace by simply disabling page
> walks in TTBR0.

I'll put the modified v2 (minor fixes mentioned on the patches) into Russell's
patch tracker as there are no more comments.

Yours,
Linus Walleij