[PATCH v2] arm64: dts: imx8mm-verdin: add TPM device
Shawn Guo
shawnguo2 at yeah.net
Thu Jun 27 19:39:58 PDT 2024
On Thu, Jun 27, 2024 at 11:48:39AM +0100, Vitor Soares wrote:
> From: Vitor Soares <vitor.soares at toradex.com>
>
> Add TPM device found on Verdin iMX8M Mini PID4 0090 variant.
>
> While adding the node, rename `pinctrl_pmic_tpm_ena` to
> `pinctrl_tpm_spi_cs`.
>
> Signed-off-by: Vitor Soares <vitor.soares at toradex.com>
> ---
> v1->v2
> - rename `pinctrl_pmic_tpm_ena` to `pinctrl_tpm_spi_cs`.
>
> .../boot/dts/freescale/imx8mm-verdin.dtsi | 18 ++++++++++++------
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> index 98544741ce17..6e066bd5d982 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> @@ -228,15 +228,16 @@ &ecspi2 {
> pinctrl-0 = <&pinctrl_ecspi2>;
> };
>
> -/* Verdin CAN_1 (On-module) */
> +/* On-module SPI */
> &ecspi3 {
> #address-cells = <1>;
> #size-cells = <0>;
> - cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
> + cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>, <&gpio4 19 GPIO_ACTIVE_LOW>;
> pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_ecspi3>;
> + pinctrl-0 = <&pinctrl_ecspi3>, <&pinctrl_tpm_spi_cs>;
> status = "okay";
>
> + /* Verdin CAN_1 */
> can1: can at 0 {
> compatible = "microchip,mcp251xfd";
> clocks = <&clk40m>;
> @@ -246,6 +247,12 @@ can1: can at 0 {
> reg = <0>;
> spi-max-frequency = <8500000>;
> };
> +
> + verdin_som_tpm: tpm at 1 {
> + compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
> + reg = <0x1>;
> + spi-max-frequency = <36000000>;
> + };
> };
>
> /* Verdin ETH_1 (On-module PHY) */
> @@ -808,8 +815,7 @@ &iomuxc {
> pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>,
> <&pinctrl_gpio3>, <&pinctrl_gpio4>,
> <&pinctrl_gpio7>, <&pinctrl_gpio8>,
> - <&pinctrl_gpio_hog1>, <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>,
> - <&pinctrl_pmic_tpm_ena>;
> + <&pinctrl_gpio_hog1>, <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>;
>
> pinctrl_can1_int: can1intgrp {
> fsl,pins =
> @@ -1111,7 +1117,7 @@ pinctrl_sai5: sai5grp {
> };
>
> /* control signal for optional ATTPM20P or SE050 */
> - pinctrl_pmic_tpm_ena: pmictpmenagrp {
> + pinctrl_tpm_spi_cs: pmictpmenagrp {
The node name should probably be updated to match pinctrl label?
Shawn
> fsl,pins =
> <MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x106>; /* PMIC_TPM_ENA */
> };
> --
> 2.34.1
>
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