[PATCH] arm64: dts: s32g: add the pinctrl node

[Krzysztof Kozlowski]

On 23/07/2024 14:37, Andrei Stefanescu wrote:
> Add the pinctrl node in the device tree in order to enable the
> S32G2/S32G3 pinctrl driver to probe.
> 
> Signed-off-by: Andrei Stefanescu <andrei.stefanescu at oss.nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/s32g2.dtsi | 51 +++++++++++++++++++++++
>  arch/arm64/boot/dts/freescale/s32g3.dtsi | 53 +++++++++++++++++++++++-
>  2 files changed, 103 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index fc19ae2e8d3b..b31f6857640b 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -159,5 +159,56 @@ gic: interrupt-controller at 50800000 {
>  			interrupt-controller;
>  			#interrupt-cells = <3>;
>  		};
> +
> +		pinctrl: pinctrl at 4009c240 {
> +			compatible = "nxp,s32g2-siul2-pinctrl";
> +				/* MSCR0-MSCR101 registers on siul2_0 */
> +			reg = <0x4009c240 0x198>,
> +				/* MSCR112-MSCR122 registers on siul2_1 */
> +			      <0x44010400 0x2c>,
> +				/* MSCR144-MSCR190 registers on siul2_1 */
> +			      <0x44010480 0xbc>,
> +				/* IMCR0-IMCR83 registers on siul2_0 */
> +			      <0x4009ca40 0x150>,
> +				/* IMCR119-IMCR397 registers on siul2_1 */
> +			      <0x44010c1c 0x45c>,
> +				/* IMCR430-IMCR495 registers on siul2_1 */
> +			      <0x440110f8 0x108>;
> +			status = "okay";

Where did you disable it?

> +
> +			jtag_pins: jtag_pins {

Underscores are not allowed. Please follow DTS coding style. The
mainline one, not NXP coding style. Several other places here have also
issues, so be sure you read if carefully.

>  	timer {

Best regards,
Krzysztof