[PATCH 1/2] arm64: dts: imx8-ss-dma: add #address-cells and #size-cells to LPI2C nodes

[Frank Li]

On Wed, Jul 17, 2024 at 03:50:25PM +0200, Alexander Stein wrote:
> These properties are required by i2c-controller.yaml bindings.
> Add them on SoC level, rather than on board level.
> 

Reviewed-by: Frank Li <Frank.Li at nxp.com>

> Signed-off-by: Alexander Stein <alexander.stein at ew.tq-group.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> index f7a91d43a0ffe..3f521441faf7e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> @@ -303,6 +303,8 @@ adma_pwm_lpcg: clock-controller at 5a590000 {
>  
>  	i2c0: i2c at 5a800000 {
>  		reg = <0x5a800000 0x4000>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
>  		interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>,
>  			 <&i2c0_lpcg IMX_LPCG_CLK_4>;
> @@ -315,6 +317,8 @@ i2c0: i2c at 5a800000 {
>  
>  	i2c1: i2c at 5a810000 {
>  		reg = <0x5a810000 0x4000>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
>  		interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>,
>  			 <&i2c1_lpcg IMX_LPCG_CLK_4>;
> @@ -327,6 +331,8 @@ i2c1: i2c at 5a810000 {
>  
>  	i2c2: i2c at 5a820000 {
>  		reg = <0x5a820000 0x4000>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
>  		interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>,
>  			 <&i2c2_lpcg IMX_LPCG_CLK_4>;
> @@ -339,6 +345,8 @@ i2c2: i2c at 5a820000 {
>  
>  	i2c3: i2c at 5a830000 {
>  		reg = <0x5a830000 0x4000>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
>  		interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>,
>  			 <&i2c3_lpcg IMX_LPCG_CLK_4>;
> -- 
> 2.34.1
>