[PATCH v2 2/3] pwm: imx27: Add 32k clock for pwm in i.MX8QXP MIPI subsystem
Christophe JAILLET
christophe.jaillet at wanadoo.fr
Tue Jul 16 11:49:04 PDT 2024
Le 15/07/2024 à 22:29, Frank Li a écrit :
> From: Liu Ying <victor.liu-3arQi8VN3Tc at public.gmane.org>
>
> PWM in i.MX8QXP MIPI subsystem needs the clock '32k'. Use it if the DTS
> provides that.
>
> Signed-off-by: Liu Ying <victor.liu-3arQi8VN3Tc at public.gmane.org>
> Signed-off-by: Frank Li <Frank.Li-3arQi8VN3Tc at public.gmane.org>
> ---
> Change from v1 to v2
> - remove if check for clk
> - use dev_err_probe
> - remove int val
Hi,
maybe, switching to clk_bulk_get_all() and the clk_bulk API would
simplify the code?
See [1] for a similar discussion related to devicetrees and binding if
such a change is done.
I'm not familiar with it, so I just point it out.
Just my 2c.
CJ
[1]:
https://lore.kernel.org/all/65b422fe-ecc1-4f57-bb72-f2fef3a5af28@collabora.com/
> ---
> drivers/pwm/pwm-imx27.c | 26 +++++++++++++++++++++-----
> 1 file changed, 21 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pwm/pwm-imx27.c b/drivers/pwm/pwm-imx27.c
> index 9e2bbf5b4a8ce..253afe94c4776 100644
> --- a/drivers/pwm/pwm-imx27.c
> +++ b/drivers/pwm/pwm-imx27.c
> @@ -15,6 +15,7 @@
> #include <linux/delay.h>
> #include <linux/err.h>
> #include <linux/io.h>
> +#include <linux/iopoll.h>
> #include <linux/kernel.h>
> #include <linux/module.h>
> #include <linux/of.h>
> @@ -82,6 +83,7 @@
> struct pwm_imx27_chip {
> struct clk *clk_ipg;
> struct clk *clk_per;
> + struct clk *clk_32k;
> void __iomem *mmio_base;
>
> /*
> @@ -101,23 +103,32 @@ static int pwm_imx27_clk_prepare_enable(struct pwm_imx27_chip *imx)
> {
> int ret;
>
> + ret = clk_prepare_enable(imx->clk_32k);
> + if (ret)
> + goto err1;
> +
> ret = clk_prepare_enable(imx->clk_ipg);
> if (ret)
> - return ret;
> + goto err2;
>
> ret = clk_prepare_enable(imx->clk_per);
> - if (ret) {
> - clk_disable_unprepare(imx->clk_ipg);
> - return ret;
> - }
> + if (ret)
> + goto err3;
>
> return 0;
> +err3:
> + clk_disable_unprepare(imx->clk_ipg);
> +err2:
> + clk_disable_unprepare(imx->clk_32k);
> +err1:
> + return ret;
> }
>
> static void pwm_imx27_clk_disable_unprepare(struct pwm_imx27_chip *imx)
> {
> clk_disable_unprepare(imx->clk_per);
> clk_disable_unprepare(imx->clk_ipg);
> + clk_disable_unprepare(imx->clk_32k);
> }
>
> static int pwm_imx27_get_state(struct pwm_chip *chip,
> @@ -325,6 +336,11 @@ static int pwm_imx27_probe(struct platform_device *pdev)
> return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_per),
> "failed to get peripheral clock\n");
>
> + imx->clk_32k = devm_clk_get_optional(&pdev->dev, "32k");
> + if (IS_ERR(imx->clk_32k))
> + return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_32k),
> + "failed to get 32k clock\n");
> +
> chip->ops = &pwm_imx27_ops;
>
> imx->mmio_base = devm_platform_ioremap_resource(pdev, 0);
>
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