[PATCH 0/3] address S32G2/S32G3 SoC based boards particularities
Ulf Hansson
ulf.hansson at linaro.org
Fri Jul 12 02:09:28 PDT 2024
On Mon, 8 Jul 2024 at 14:10, Ciprian Costea
<ciprianmarian.costea at oss.nxp.com> wrote:
>
> This patchset addresses S32G2/S32G3 SoC based boards
> uSDHC controller particularities such as:
> - GPIO card detect wake mechanism is not available
>
> It also fixes a clocking usage issue on 'clk_get_rate',
> in case of 'per' clock.
>
> Changes in v2:
> - Dropped option to not change pinctrl during PM.
> Instead, when S32G2/S32G3 uSDHC pinctrl entries will be
> upstream'ed, 'sleep' pinctrl will not be defined.
>
> Ciprian Costea (3):
> mmc: sdhci-esdhc-imx: disable card detect wake for S32G based
> platforms
> mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablement
> MAINTAINERS: add 's32 at nxp.com' as relevant mailing list for
> 'sdhci-esdhc-imx' driver
>
> MAINTAINERS | 1 +
> drivers/mmc/host/sdhci-esdhc-imx.c | 16 +++++++++++++---
> 2 files changed, 14 insertions(+), 3 deletions(-)
>
Applied for next, thanks!
Kind regards
Uffe
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