[PATCH v2 2/4] dt-bindings: arm: Add binding document for Coresight Control Unit device.

[Jie Gan]

Add binding document for Coresight Control Unit device.

Signed-off-by: Jie Gan <quic_jiegan at quicinc.com>
---
 .../bindings/arm/qcom,coresight-ccu.yaml      | 87 +++++++++++++++++++
 1 file changed, 87 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml

diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml
new file mode 100644
index 000000000000..9bb8ced393a7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom,coresight-ccu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: CoreSight Control Unit
+
+maintainers:
+  - Yuanfang Zhang <quic_yuanfang at quicinc.com>
+  - Mao Jinlong <quic_jinlmao at quicinc.com>
+  - Jie Gan <quic_jiegan at quicinc.com>
+
+description:
+  The Coresight Control unit controls various Coresight behaviors.
+  Used to enable/disable ETR’s data filter function based on trace ID.
+
+properties:
+  compatible:
+    const: qcom,coresight-ccu
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: apb_pclk
+
+  reg-names:
+    items:
+      - const: ccu-base
+
+  in-ports:
+    $ref: /schemas/graph.yaml#/properties/ports
+
+    unevaluatedProperties:
+      patternProperties:
+        '^port(@[0-7])?$':
+          description: Input connections from CoreSight Trace bus
+          $ref: /schemas/graph.yaml#/properties/port
+
+          properties:
+            qcom,ccu-atid-offset:
+              description:
+                Offset to the Coresight Control Unit component's ATID register
+                that is used by specific TMC ETR. The ATID register can be programed based
+                on the trace id to filter out specific trace data which gets into ETR buffer.
+              $ref: /schemas/types.yaml#/definitions/uint32
+
+required:
+  - compatible
+  - reg
+  - in-ports
+
+additionalProperties: false
+
+examples:
+  - |
+    syscon at 1001000 {
+        compatible = "qcom,coresight-ccu";
+        reg = <0x1001000 0x1000>;
+        reg-names = "ccu-base";
+
+        in-ports {
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            port at 0 {
+                reg = <0>;
+                ccu_in_port0: endpoint {
+                    qcom,ccu-atid-offset = <0x1f>;
+                    remote-endpoint = <&etr0_out_port>;
+                };
+            };
+
+            port at 1 {
+                reg = <1>;
+                ccu_in_port1: endpoint {
+                    qcom,ccu-atid-offset = <0x2f>;
+                    remote-endpoint = <&etr1_out_port>;
+                };
+            };
+        };
+    };
-- 
2.34.1