[PATCH] Documentation: arm64: Update memory.rst for TBI

[Catalin Marinas]

On Tue, 02 Jul 2024 10:13:49 +0100, Kevin Brodsky wrote:
> Most of memory.rst was written very early, at a time where TBI (Top
> Byte Ignore) was not enabled. Nowadays TBI0 is always enabled, and
> TBI1 may be enabled, depending on the kernel configuration. This
> means that VA bits 63:56 cannot generally be assumed to have any
> particular value.
> 
> Regardless of TBI, TTBRx selection is done based on bit 55; update
> memory.rst accordingly.
> 
> [...]

Applied to arm64 (for-next/doc), thanks!

[1/1] Documentation: arm64: Update memory.rst for TBI
      https://git.kernel.org/arm64/c/5e30c16b58a4

-- 
Catalin