[PATCH net] net: stmmac: dwmac4: fix PCS duplex mode decode

Serge Semin fancer.lancer at gmail.com
Wed Jul 3 07:55:58 PDT 2024


On Wed, Jul 03, 2024 at 01:24:40PM +0100, Russell King (Oracle) wrote:
> dwmac4 was decoding the duplex mode from the GMAC_PHYIF_CONTROL_STATUS
> register incorrectly, using GMAC_PHYIF_CTRLSTATUS_LNKMOD_MASK (value 1)
> rather than GMAC_PHYIF_CTRLSTATUS_LNKMOD (bit 16). Fix this.
> 
> Thanks to Abhishek Chauhan for providing a response on this issue.
> 
> Signed-off-by: Russell King (Oracle) <rmk+kernel at armlinux.org.uk>

Right. The PHYIF_CTRLSTATUS CSR has the link status bits defined
starting from 16-bit position. So the method has improperly detected
duplex mode. Bit zero is occupied with the TC-flag (transmit RGMII,
SMII, SGMII configs) which is never set and which means the method
always reported the half-duplex link mode.

Reviewed-by: Serge Semin <fancer.lancer at gmail.com>

-Serge(y)

> ---
>  drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> index b25774d69195..26d837554a2d 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> @@ -791,7 +791,7 @@ static void dwmac4_phystatus(void __iomem *ioaddr, struct stmmac_extra_stats *x)
>  		else
>  			x->pcs_speed = SPEED_10;
>  
> -		x->pcs_duplex = (status & GMAC_PHYIF_CTRLSTATUS_LNKMOD_MASK);
> +		x->pcs_duplex = (status & GMAC_PHYIF_CTRLSTATUS_LNKMOD);
>  
>  		pr_info("Link is Up - %d/%s\n", (int)x->pcs_speed,
>  			x->pcs_duplex ? "Full" : "Half");
> -- 
> 2.30.2
> 



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