[PATCH] dt-bindings: mfd: syscon: Add ti,k3-pcie-ctrl compatible

[Krzysztof Kozlowski]

On 01/02/2024 05:48, Siddharth Vadapalli wrote:
> Hello Andrew,
> 
> On 31/01/24 21:43, Andrew Davis wrote:
>> On 1/31/24 5:23 AM, Siddharth Vadapalli wrote:
>>> The PCIE_CTRL registers within the CTRL_MMR space of TI's K3 SoCs are
>>> used to configure the link speed, lane count and mode of operation of
>>> the respective PCIe instance. Add compatible for allowing the PCIe
>>> driver to obtain a regmap for the PCIE_CTRL register within the System
>>> Controller device-tree node in order to configure the PCIe instance
>>> accordingly.
>>>
>>> Signed-off-by: Siddharth Vadapalli <s-vadapalli at ti.com>
>>> ---
>>>
>>> This patch is based on linux-next tagged next-20240131.
>>>
>>>   Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
>>>   1 file changed, 1 insertion(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> b/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> index 084b5c2a2a3c..da571a24e21f 100644
>>> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> @@ -73,6 +73,7 @@ properties:
>>>                 - rockchip,rv1126-qos
>>>                 - starfive,jh7100-sysmain
>>>                 - ti,am654-dss-oldi-io-ctrl
>>> +              - ti,k3-pcie-ctrl
>>
>> This might not be the same for all K3 devices, you should use
>> the name of the first device which uses this, so:
>>
>> ti,j721e-pcie-ctrl
> 
> It is the same for all K3 devices so far. However, since the convention appears
> to be the first device that it is applicable to as you pointed out, I will post
> the v2 patch for this accordingly.

This was repeated so many times... so one more. Compatibles are specific
to SoC, not to family.

https://elixir.bootlin.com/linux/v6.1-rc1/source/Documentation/devicetree/bindings/writing-bindings.rst#L42

Best regards,
Krzysztof