[PATCH v2] dt-bindings: misc: xlnx,sd-fec: convert bindings to yaml

[Cvetic, Dragan]

Hi Rob, 

> -----Original Message-----
> From: Rob Herring <robh at kernel.org>
> Sent: Monday, January 29, 2024 10:21 PM
> To: Cvetic, Dragan <dragan.cvetic at amd.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>; Rob Herring
> <robh+dt at kernel.org>; Simek, Michal <michal.simek at amd.com>; open
> list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
> <devicetree at vger.kernel.org>; Jonathan Corbet <corbet at lwn.net>; Kiernan,
> Derek <derek.kiernan at amd.com>; moderated list:ARM/ZYNQ ARCHITECTURE
> <linux-arm-kernel at lists.infradead.org>; open list:DOCUMENTATION <linux-
> doc at vger.kernel.org>; open list <linux-kernel at vger.kernel.org>; Erim, Salih
> <Salih.Erim at amd.com>; Conor Dooley <conor+dt at kernel.org>
> Subject: Re: [PATCH v2] dt-bindings: misc: xlnx,sd-fec: convert bindings to
> yaml
> 
> 
> On Mon, 29 Jan 2024 17:18:51 +0000, Dragan Cvetic wrote:
> > Convert AMD (Xilinx) sd-fec bindings to yaml format, so it can validate
> > dt-entries as well as any future additions to yaml.
> > Change in clocks is due to IP is itself configurable and
> > only the first two clocks are in all combinations. The last
> > 6 clocks can be present in some of them. It means order is
> > not really fixed and any combination is possible.
> > Interrupt may or may not be present.
> > The documentation for sd-fec bindings is now YAML, so update the
> > MAINTAINERS file.
> > Update the link to the new yaml file in xilinx_sdfec.rst.
> >
> > Signed-off-by: Dragan Cvetic <dragan.cvetic at amd.com>
> > ---
> > Changes in v2:
> > ---
> > Drop clocks description.
> > Use "contains:" with enum for optional clock-names and update
> > comment explaining diference from the original DT binding file.
> > Remove trailing full stops.
> > Add more details in sdfec-code description.
> > Set sdfec-code to "string" not "string-array"
> > ---
> >  .../devicetree/bindings/misc/xlnx,sd-fec.txt  |  58 --------
> >  .../devicetree/bindings/misc/xlnx,sd-fec.yaml | 136 ++++++++++++++++++
> >  Documentation/misc-devices/xilinx_sdfec.rst   |   2 +-
> >  MAINTAINERS                                   |   2 +-
> >  4 files changed, 138 insertions(+), 60 deletions(-)
> >  delete mode 100644 Documentation/devicetree/bindings/misc/xlnx,sd-
> fec.txt
> >  create mode 100644 Documentation/devicetree/bindings/misc/xlnx,sd-
> fec.yaml
> >
> 
> My bot found errors running 'make DT_CHECKER_FLAGS=-m
> dt_binding_check'


Accepted, will do it.


> on your patch (DT_CHECKER_FLAGS is new in v5.13):
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> Error: Documentation/devicetree/bindings/misc/xlnx,sd-
> fec.example.dts:32.29-30 syntax error
> FATAL ERROR: Unable to parse input tree
> make[2]: *** [scripts/Makefile.lib:419:
> Documentation/devicetree/bindings/misc/xlnx,sd-fec.example.dtb] Error 1
> make[2]: *** Waiting for unfinished jobs....
> make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1428:
> dt_binding_check] Error 2
> make: *** [Makefile:240: __sub-make] Error 2
> 
> doc reference errors (make refcheckdocs):
> 
> See https://patchwork.ozlabs.org/project/devicetree-
> bindings/patch/20240129171854.3570055-1-dragan.cvetic at amd.com
> 
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
> 
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
> 
> pip3 install dtschema --upgrade
> 
> Please check and re-submit after running the above command yourself. Note
> that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> your schema. However, it must be unset to test all examples with your
> schema.

All comments accepted

Kind Regards
Dragan