[PATCH v2 3/6] arm64: dts: exynos: gs101: use correct clocks for usi8
André Draszik
andre.draszik at linaro.org
Tue Jan 30 01:36:42 PST 2024
Wrong pclk clocks have been used in this usi8 instance here. For USI
and I2C, we need the ipclk and pclk, where pclk is the bus clock.
Without it, nothing can work.
It is unclear what exactly is using USI8_USI_CLK, but it is not
required for the IP to be operational at this stage, while pclk is.
This also brings the DT in line with the clock names expected by the
usi and i2c drivers.
Update the DTSI accordingly.
Fixes: 6d44d1a1fb62 ("arm64: dts: exynos: gs101: define USI8 with I2C configuration")
Signed-off-by: André Draszik <andre.draszik at linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko at linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus at linaro.org>
Tested-by: Tudor Ambarus <tudor.ambarus at linaro.org>
---
v2:
* add an empty line to commit message
* collect Reviewed-by: Tested-by: tags
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index bc251e565be6..e5b665be2d62 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -380,7 +380,7 @@ usi8: usi at 109700c0 {
ranges;
#address-cells = <1>;
#size-cells = <1>;
- clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK>,
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x101c>;
@@ -397,7 +397,7 @@ hsi2c_8: i2c at 10970000 {
pinctrl-names = "default";
pinctrl-0 = <&hsi2c8_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>,
- <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK>;
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>;
clock-names = "hsi2c", "hsi2c_pclk";
status = "disabled";
};
--
2.43.0.429.g432eaa2c6b-goog
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