[PATCH 4/9] arm64: dts: exynos: gs101: enable cmu-peric1 clock controller

[Sam Protsenko]

On Fri, Jan 26, 2024 at 6:19 PM André Draszik <andre.draszik at linaro.org> wrote:
>
> Enable the cmu-peric1 clock controller. It feeds additional USI, I3C
> and PWM interfaces / busses.
>
> Signed-off-by: André Draszik <andre.draszik at linaro.org>
> ---

Reviewed-by: Sam Protsenko <semen.protsenko at linaro.org>

>  arch/arm64/boot/dts/exynos/google/gs101.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> index aaac04df5e65..5088c81fd6aa 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -429,6 +429,16 @@ serial_0: serial at 10a00000 {
>                         };
>                 };
>
> +               cmu_peric1: clock-controller at 10c00000 {
> +                       compatible = "google,gs101-cmu-peric1";
> +                       reg = <0x10c00000 0x4000>;
> +                       #clock-cells = <1>;
> +                       clocks = <&ext_24_5m>,
> +                                <&cmu_top CLK_DOUT_CMU_PERIC1_BUS>,
> +                                <&cmu_top CLK_DOUT_CMU_PERIC1_IP>;
> +                       clock-names = "oscclk", "bus", "ip";
> +               };
> +
>                 sysreg_peric1: syscon at 10c20000 {
>                         compatible = "google,gs101-peric1-sysreg", "syscon";
>                         reg = <0x10c20000 0x10000>;
> --
> 2.43.0.429.g432eaa2c6b-goog
>