[PATCH v2 05/28] spi: dt-bindings: samsung: add samsung,spi-fifosize property
Tudor Ambarus
tudor.ambarus at linaro.org
Thu Jan 25 08:38:07 PST 2024
On 1/25/24 16:16, Mark Brown wrote:
> On Thu, Jan 25, 2024 at 02:49:43PM +0000, Tudor Ambarus wrote:
>> Up to now the SPI alias was used as an index into an array defined in
>> the SPI driver to determine the SPI FIFO size. Drop the dependency on
>> the SPI alias and allow the SPI nodes to specify their SPI FIFO size.
>
> ...
>
>> + samsung,spi-fifosize:
>> + description: The fifo size supported by the SPI instance.
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + enum: [64, 256]
>
> Do we have any cases where we'd ever want to vary this independently of
> the SoC - this isn't a configurable IP shipped to random integrators?
The IP supports FIFO depths from 8 to 256 bytes (in powers of 2 I
guess). The integrator is the one dictating the IP configuration. In
gs101's case all USIxx_USI (which includes SPI, I2C, and UART) are
configured with 64 bytes FIFO depths.
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