[PATCH 4/7] clk: samsung: exynos850: Propagate SPI IPCLK rate change

[Krzysztof Kozlowski]

On 20/01/2024 02:29, Sam Protsenko wrote:
> @@ -974,19 +974,19 @@ static const struct samsung_fixed_rate_clock cmgp_fixed_clks[] __initconst = {
>  static const struct samsung_mux_clock cmgp_mux_clks[] __initconst = {
>  	MUX(CLK_MOUT_CMGP_ADC, "mout_cmgp_adc", mout_cmgp_adc_p,
>  	    CLK_CON_MUX_CLK_CMGP_ADC, 0, 1),
> -	MUX(CLK_MOUT_CMGP_USI0, "mout_cmgp_usi0", mout_cmgp_usi0_p,
> -	    CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP0, 0, 1),
> -	MUX(CLK_MOUT_CMGP_USI1, "mout_cmgp_usi1", mout_cmgp_usi1_p,
> -	    CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP1, 0, 1),
> +	MUX_F(CLK_MOUT_CMGP_USI0, "mout_cmgp_usi0", mout_cmgp_usi0_p,
> +	    CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP0, 0, 1, CLK_SET_RATE_PARENT, 0),
> +	MUX_F(CLK_MOUT_CMGP_USI1, "mout_cmgp_usi1", mout_cmgp_usi1_p,
> +	    CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP1, 0, 1, CLK_SET_RATE_PARENT, 0),

Checkpatch strict complains on missing alignment. Please fix.

Best regards,
Krzysztof