[PATCH 8/8] arm64: dts: qcom: ipq5018-rdp432-c2: enable ethernet support

[Ziyang Huang]

Signed-off-by: Ziyang Huang <hzyitc at outlook.com>
---
 .../arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 52 +++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
index e636a1cb9b77..074b78d7939c 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
@@ -15,6 +15,9 @@ / {
 
 	aliases {
 		serial0 = &blsp1_uart1;
+
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
 	};
 
 	chosen {
@@ -43,6 +46,22 @@ &sleep_clk {
 };
 
 &tlmm {
+	mdio1_pins: mdio1_pins {
+		mdc {
+			pins = "gpio36";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		mdio {
+			pins = "gpio37";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
 	sdc_default_state: sdc-default-state {
 		clk-pins {
 			pins = "gpio9";
@@ -70,3 +89,36 @@ data-pins {
 &xo_board_clk {
 	clock-frequency = <24000000>;
 };
+
+&mdio0 {
+	status = "ok";
+};
+
+&mdio1 {
+	pinctrl-0 = <&mdio1_pins>;
+	pinctrl-names = "default";
+	status = "ok";
+
+	reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
+
+	qca8081: ethernet-phy at 28 {
+		reg = <28>;
+	};
+};
+
+&uniphy0 {
+	mode = <QCOM_ETH_UNIPHY_MODE_SGMII>;
+	clkout-frequency = <QCOM_ETH_UNIPHY_CLKOUT_FREQ_50M>;
+	clkout-drive-strength = <QCOM_ETH_UNIPHY_CLKOUT_DS_1_5V>;
+	status = "ok";
+};
+
+&gmac0 {
+	status = "ok";
+};
+
+&gmac1 {
+	phy-handle = <&qca8081>;
+	phy-mode = "sgmii";
+	status = "ok";
+};
-- 
2.40.1