[PATCH 2/3] dt-bindings: PCI: ti,j721e-pci-*: Add checks for max-link-speed

Krzysztof Kozlowski krzysztof.kozlowski at linaro.org
Wed Jan 17 03:00:22 PST 2024


On 17/01/2024 11:58, Siddharth Vadapalli wrote:
> On 17/01/24 16:05, Krzysztof Kozlowski wrote:
>> On 17/01/2024 11:25, Siddharth Vadapalli wrote:
>>> Extend the existing compatible based checks for validating and enforcing
>>> the "max-link-speed" property.
>>
>> Based on what? Driver or hardware? Your entire change suggests you
> 
> Hardware. The PCIe controller on AM64 SoC supports up to Gen2 link speed while
> the PCIe controllers on other SoCs support Gen3 link speed.
> 
>> should just drop it from the binding, because this can be deduced from
>> compatible.
> 
> Could you please clarify? Isn't the addition of the checks for "max-link-speed"
> identical to the checks which were added for "num-lanes", both of which are
> Hardware specific?

Compatible defines these values, at least what it looks like from the patch.

Best regards,
Krzysztof




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