[PATCH 3/3] ARM: dts: renesas: r8a73a4: Fix thermal parent clock

[Geert Uytterhoeven]

According to Table 8.1, "Summary of Module Power, Reset condition and
Clock assignment" of the R-Mobile APE6 Hardware Manual Rev. 0.7, the
parent clock of the thermal sensor clock is the Common Peripheral (CP)
clock, which runs at 13 MHz (main clock / 2).

As the R-Car Thermal driver does not use the clock rate, this change has
no functional impact.

Signed-off-by: Geert Uytterhoeven <geert+renesas at glider.be>
---
 arch/arm/boot/dts/renesas/r8a73a4.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/renesas/r8a73a4.dtsi b/arch/arm/boot/dts/renesas/r8a73a4.dtsi
index 6847acaecc809eaa..b3d5c154cfc1b8c1 100644
--- a/arch/arm/boot/dts/renesas/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a73a4.dtsi
@@ -814,7 +814,7 @@ R8A73A4_CLK_IIC3
 		mstp5_clks: mstp5_clks at e6150144 {
 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
-			clocks = <&extal2_clk>, <&cpg_clocks R8A73A4_CLK_HP>;
+			clocks = <&cp_clk>, <&cpg_clocks R8A73A4_CLK_HP>;
 			#clock-cells = <1>;
 			clock-indices = <
 				R8A73A4_CLK_THERMAL R8A73A4_CLK_IIC8
-- 
2.34.1