[PATCH] KVM: arm64: Add missing ERX*_EL1 registers

[Marc Zyngier]

On Wed, 10 Jan 2024 07:57:39 +0000,
Ruidong Tian <tianruidong at linux.alibaba.com> wrote:
> 
> Commit 464f2164da7e ("arm64: Add missing ERX*_EL1 encodings") add some
> new RAS registers. Trap them to kvm.

Well, they *are* already trapped by virtue of HCR_EL2.FIEN being
0. They are lacking a trap handler though.

> 
> Signed-off-by: Ruidong Tian <tianruidong at linux.alibaba.com>
> ---
>  arch/arm64/kvm/sys_regs.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 30253bd19917..76a9ba155d58 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -2389,8 +2389,13 @@ static const struct sys_reg_desc sys_reg_descs[] = {
>  	{ SYS_DESC(SYS_ERXCTLR_EL1), trap_raz_wi },
>  	{ SYS_DESC(SYS_ERXSTATUS_EL1), trap_raz_wi },
>  	{ SYS_DESC(SYS_ERXADDR_EL1), trap_raz_wi },
> +	{ SYS_DESC(SYS_ERXPFGF_EL1), trap_raz_wi },
> +	{ SYS_DESC(SYS_ERXPFGCTL_EL1), trap_raz_wi },
> +	{ SYS_DESC(SYS_ERXPFGCDN_EL1), trap_raz_wi },
>  	{ SYS_DESC(SYS_ERXMISC0_EL1), trap_raz_wi },
>  	{ SYS_DESC(SYS_ERXMISC1_EL1), trap_raz_wi },
> +	{ SYS_DESC(SYS_ERXMISC2_EL1), trap_raz_wi },
> +	{ SYS_DESC(SYS_ERXMISC3_EL1), trap_raz_wi },
>  
>  	MTE_REG(TFSR_EL1),
>  	MTE_REG(TFSRE0_EL1),

If my reading of the ARM ARM is correct, these registers only exist if
FEAT_RASv1p1 is implemented. Which means that we shouldn't handle
those as RAZ/WI unconditionally, but instead check for what we
advertise to the guest and handle it accordingly.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.