[RFC] FPGA Subsystem User Space Interface Proposal

gregkh at linuxfoundation.org gregkh at linuxfoundation.org
Thu Jan 4 00:02:39 PST 2024


On Thu, Jan 04, 2024 at 04:52:15AM +0000, Manne, Nava kishore wrote:
> =======================================================================
> | Introduction                                                        |
> =======================================================================
> This document provides a detailed overview of the proposed Kernel feature for FPGA Manager subsystem user interface.
> It describes the problem statement behind the proposal, the problem to be solved, a top-level solution design.
> 
> Table of Contents:
> ------------------
> A. Problem Statement and Background
> B. Scope and Out of scope of the proposal
>      B.1 Scope
>      B.2 Out of scope
> C. Proposed Solution
> D. Proposed User Interface Details
> =======================================================================
> | A. Problem Statement and Background                                        |
> =======================================================================
> The existing FPGA manager subsystem didn't have any user space interface (other than the status/state in sysfs) in Kernel. 
> Basically, FPGAs are semiconductor devices that can be reprogrammed for desired hardware functionality.
> FPGAs can be reprogrammed at runtime with different types of logic and IPs as per user need and hence there is a need to use device tree overlays for removing/updating/adding the devices at runtime for the IPs/controllers that are present in FPGA. 
> But we don't have any user interface in kernel for updating the device tree at runtime.

Can you line-wrap your emails to make them easier to read?

Also, something went wrong here:

>                                                                     . --------------------------------------.                       .-----------------------------------------.                        
>                                                                    |                                                    |                     |                                                        |
>                                                                    |                           .------------------|                     |---------------------.                           |
>                                                                    |                           | sysfs_load() |<=======> |Overaly_apply()|                          | 
> .---------------------------------.                     |                           '------------------|                     |---------------------'                           |
> |                                          |                     |                                                    |                     |                                                        |
> |    New Sysfs interface   |        ====>   |       of-fpga-region .c               |                     |            DT Overlay.c                      |
> |       load/unload             |                      |                                                   |                     |                                                        |
> '--------------------------------'                      |                      .---------------------|                     |-------------------------.                     |
>                                                                     |                     | sysfs_unload() |<=======> | Overlay_remove() |                    |
>                                                                     |                      '-------------------- |                     |-------------------------'                     |
>                                                                     |                                                   |                     |                                                       |
>                                                                      '----------------------------------- --'                       '------------------------------------------'


And here:

>      .-----------------------.                       .--------------------------------------------.
>     | Host CPU              |                   |             FPGA                                      |
>     |                                |                   |                                                            |
>     |                           -- -|                   |                  -----------             ---------  |
>     |                         | H |                   |       |==>| Bridge0 |<==>| PRR0 | |
>     |                         | W|                   |       |         -----------             --------    |
>     |                         |     |                   |       |                                                   |
>     |                         | B |<=====>    |<== |         -----------             --------   |
>     |                         | R |                   |        |==>| Bridge1 |<==>| PRR1| |
>     |                         |  I |                   |        |        -----------              --------   |
>     |                         | D |                  |        |                                                   |
>     |                         | G |                  |        |         -----------               -------   |
>     |                         | E |                   |        |==>| Bridge2 |<==>| PRR2 ||
>     |                          ----|                  |                   -----------               --------  |
>     |                               |                  |                                                              |
>      '-----------------------'                     '---------------------------------------------'

Your spaces all seem too big, making this really hard to read.

But really, we need to see some code before we can go further.
"proposals" are great, but that's not how kernel development works, we
need actual patches to be able to evaluate anything, as that shows you
at least have a working implementation to start with, and that you have
resolved any of the obvious issues ahead of time.

thanks,

greg k-h



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