[PATCH 2/4] arm64: dts: imx8dxl: add lpuart device in cm40 subsystem
Frank Li
Frank.Li at nxp.com
Wed Feb 28 11:54:58 PST 2024
From: Alice Guo <alice.guo at nxp.com>
Adding lpuart device in cm40 subsystem.
Signed-off-by: Alice Guo <alice.guo at nxp.com>
Reviewed-by: Peng Fan <peng.fan at nxp.com>
Signed-off-by: Frank Li <Frank.Li at nxp.com>
---
arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
index b1d626862ddf8..ecca5ada224b7 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
@@ -64,4 +64,29 @@ cm40_intmux: intmux at 37400000 {
power-domains = <&pd IMX_SC_R_M4_0_INTMUX>;
status = "disabled";
};
+
+ cm40_lpuart: serial at 37220000 {
+ compatible = "fsl,imx8qxp-lpuart";
+ reg = <0x37220000 0x1000>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&cm40_intmux>;
+ clocks = <&cm40_uart_lpcg 1>, <&cm40_uart_lpcg 0>;
+ clock-names = "ipg", "baud";
+ assigned-clocks = <&clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER>;
+ assigned-clock-rates = <24000000>;
+ power-domains = <&pd IMX_SC_R_M4_0_UART>;
+ status = "disabled";
+ };
+
+ cm40_uart_lpcg: clock-controller at 37620000 {
+ compatible = "fsl,imx8qxp-lpcg";
+ reg = <0x37620000 0x1000>;
+ #clock-cells = <1>;
+ clocks = <&clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER>,
+ <&cm40_ipg_clk>;
+ clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>;
+ clock-output-names = "cm40_lpcg_uart_clk",
+ "cm40_lpcg_uart_ipg_clk";
+ power-domains = <&pd IMX_SC_R_M4_0_UART>;
+ };
};
--
2.34.1
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