[PATCH 2/4] dt-bindings: arm: renesas: Document Renesas RZ/V2H{P} System Controller

[Geert Uytterhoeven]

Hi Prabhakar,

On Mon, Feb 26, 2024 at 3:01 PM Lad, Prabhakar
<prabhakar.csengg at gmail.com> wrote:
> On Mon, Feb 26, 2024 at 1:41 PM Geert Uytterhoeven <geert at linux-m68k.org> wrote:
> > On Mon, Feb 19, 2024 at 5:10 PM Prabhakar <prabhakar.csengg at gmail.com> wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml
> > > +  clocks:
> > > +    items:
> > > +      - description: Clock from external oscillator
> >
> > Isn't this SYS_0_PCLK inside the CPG?
> >
> As per the block diagram (figure 4.4-3), if we follow the clock source
> for SYS it traces back to 24MHz Oscillator. Let me know how you want
> me to describe this please.

Yes, that is the diagram I was looking at.
MAIN OSC 24 MHz -> MAINCLK -> SYS_0_PCLK.

MAIN OSC 24 MHz is a clock input to the CPG.
MAINCLK is a CPG internal core clock.
SYS_0_PCLK is a CPG clock output, serving as the SYS module clock.

I think the standard "maxItems: 1" would be fine, and no description
is needed.

> > > +
> > > +  resets:
> > > +    items:
> > > +      - description: SYS_0_PRESETN reset signal

Same here.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds