[PATCH 1/4] arm64: dts: imx8mp-phyboard-pollux: Add and update rtc devicetree node
Teresa Remmet
T.Remmet at phytec.de
Wed Feb 21 23:37:25 PST 2024
Hello Frieder,
Am Mittwoch, dem 21.02.2024 um 15:29 +0100 schrieb Frieder Schrempf:
> On 21.02.24 15:12, Yashwanth Varakala wrote:
> > [Sie erhalten nicht h?ufig E-Mails von y.varakala at phytec.de.
> > Weitere Informationen, warum dies wichtig ist, finden Sie unter
> > https://aka.ms/LearnAboutSenderIdentification ]
> >
> > The interrupt of the rtc is connected on the carrierboard
>
> s/rtc/RTC/
> s/carrierboard/carrier board/
>
> > phyBOARD-i.MX8MP-Pollux.
> >
> > RTC trickle-charger and level-switching-mode device tree properties
> > are depended on the phyboard-pollux design.
>
> There is no way to control the backup switching mode via devicetree,
> so
> this description doesn't match the code.
this is correct. We had a down stream property handling this.
This is why it probably sneaked in. It should be dropped.
>
> Also "are depended on" should probably be "depend on" or "are
> dependent
> on". And when you scratch the "level-switching-mode" it's singular of
> course.
>
> >
> > Signed-off-by: Yashwanth Varakala <y.varakala at phytec.de>
> > ---
> > .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 15
> > +++++++++++++++
> > .../boot/dts/freescale/imx8mp-phycore-som.dtsi | 1 -
> > 2 files changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-
> > rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-
> > rdk.dts
> > index c8640cac3edc..96754ce633ed 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
> > @@ -139,6 +139,15 @@ &snvs_pwrkey {
> > status = "okay";
> > };
> >
> > +&rv3028 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_rtc>;
> > + interrupt-parent = <&gpio4>;
> > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
>
> The RTC is on the SoM and the interrupt line is routed from the SoM
> to
> the carrier board and then back to the SoC? Is this really the case?
Yes, this is really the case.
> I
> would expect the IRQ to be routed within the SoM.
It was done to give the carrier board designer more freedom with the
alarm pin of the RTC.
Teresa
>
> > + wakeup-source;
> > + trickle-resistor-ohms = <3000>;
> > +};
> > +
> > /* debug console */
> > &uart1 {
> > pinctrl-names = "default";
> > @@ -295,6 +304,12 @@ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19
> > 0x40
> > >;
> > };
> >
> > + pinctrl_rtc: rtcgrp {
> > + fsl,pins = <
> > + MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19
> > 0x1C0
> > + >;
> > + };
> > +
> > pinctrl_uart1: uart1grp {
> > fsl,pins = <
> > MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX
> > 0x40
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > index c976c3b6cbc6..e6ffa6a6b68b 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > @@ -175,7 +175,6 @@ eeprom at 51 {
> > rv3028: rtc at 52 {
> > compatible = "microcrystal,rv3028";
> > reg = <0x52>;
> > - trickle-resistor-ohms = <3000>;
> > };
> > };
> >
> > --
> > 2.34.1
> >
> >
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> > linux-arm-kernel at lists.infradead.org
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> _______________________________________________
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