[PATCH 1/2] ARM: dts: imx6dl-yapp4: Fix the QCA switch register address

[Michal Vokáč]

On 13. 02. 24 14:10, Andrew Lunn wrote:
> On Tue, Feb 13, 2024 at 01:20:44PM +0100, Michal Vokáč wrote:
>> On 12. 02. 24 17:08, Andrew Lunn wrote:
>>> On Mon, Feb 12, 2024 at 04:23:41PM +0100, Michal Vokáč wrote:
>> The fact is that the switch actually works regardless of the reg value.
>> It worked prior to the 15b43e497ffd commit with address 0, it worked
>> later on with the reg value 10 and it works now with reg value 0x10.
> 
> Ah, so that is the missing piece of information from the commit
> message. That the reg value does not actually matter. Hence it is safe
> to change it.
> 
> Please reword the commit message.

OK, I will do so.

>> I admit that my understanding of the MDIO bus and addressing of
>> the connected external/internal devices is pretty limited. I have no
>> answer to why it works like that but as you brought up your questions
>> I would actually like to know as well.
> 
> My guess is, the switch assumes it has full access to all the
> addresses on the bus. It probably uses a subset, but that subset is
> hard coded. But the MDIO DT binding requires a valid reg value, so
> something has to be used.

That makes sense. The problem is that the MDIO access and addressing
of the QCA8K switch is not well documented in the datasheet.

> There are some devices which use a single address on the bus. The
> mv88e6xxx can be strapped into such a mode, so you can have multiple
> switches on the bus. The reg value is then used. But you can also
> strap it so it takes over the whole bus, and uses #num_ports + 3
> addresses on the bus, and those addresses are hard coded in the
> silicon, so the reg value is ignored.

Ah, yes I am actually aware of that feature on the mv88e6xxx. We use
it on newer board revisions. AFAIK the switch is by default strapped
to the single chip addressing mode by internal pull-ups.

Thank you very much for shedding some light to that topic!

Michal