[PATCH v2] clk: keystone: sci-clk: Adding support for non contiguous clocks

[Kamlesh Gurudasani]

Nishanth Menon <nm at ti.com> writes:

> On 16:13-20240206, Udit Kumar wrote:
>> Most of clocks and their parents are defined in contiguous range,
>> But in few cases, there is gap in clock numbers[0].
>> Driver assumes clocks to be in contiguous range, and add their clock
>> ids incrementally.
>> 
>> New firmware started returning error while calling get_freq and is_on
>> API for non-available clock ids.
>> 
>> In this fix, driver checks and adds only valid clock ids.
>> 
>> Fixes: 3c13933c6033 ("clk: keystone: sci-clk: add support for dynamically probing clocks")
>> 
>> [0] https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j7200/clocks.html
>> Section Clocks for NAVSS0_CPTS_0 Device,
>> clock id 12-15 not present.
>> 
>> Signed-off-by: Udit Kumar <u-kumar1 at ti.com>
>>  				while (num_parents--) {
>> +					/* Check if this clock id is valid */
>> +					ret = provider->ops->get_freq(provider->sci,
>> +						sci_clk->dev_id, clk_id, &freq);
>
> get_freq is a bit expensive as it has to walk the clock tree to find
> the clock frequency (at least the first time?). just wondering if
> there is lighter alternative here?
>
How about get_clock? Doesn't read the registers at least.

Regards,
Kamlesh