[PATCH v2 3/6] media: dt-bindings: media: add bindings for rockchip rk3568 vicap
Rob Herring
robh at kernel.org
Mon Dec 30 12:08:37 PST 2024
On Tue, Dec 17, 2024 at 04:55:15PM +0100, Michael Riesch wrote:
> Add documentation for the Rockchip RK3568 Video Capture (VICAP) unit.
>
> Signed-off-by: Michael Riesch <michael.riesch at wolfvision.net>
> ---
> .../bindings/media/rockchip,rk3568-vicap.yaml | 168 +++++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 169 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml
> new file mode 100644
> index 000000000000..ef7b14ca6879
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml
> @@ -0,0 +1,168 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/rockchip,rk3568-vicap.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip RK3568 Video Capture (VICAP)
> +
> +maintainers:
> + - Michael Riesch <michael.riesch at wolfvision.net>
> +
> +description:
> + The Rockchip RK3568 Video Capture (VICAP) block features a digital video
> + port (DVP, a parallel video interface) and a MIPI CSI-2 port. It receives
> + the data from camera sensors, video decoders, or other companion ICs and
> + transfers it into system main memory by AXI bus.
> +
> +properties:
> + compatible:
> + const: rockchip,rk3568-vicap
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: ACLK
> + - description: HCLK
> + - description: DCLK
> + - description: ICLK
> +
> + clock-names:
> + items:
> + - const: aclk
> + - const: hclk
> + - const: dclk
> + - const: iclk
> +
> + rockchip,cif-clk-delaynum:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 127
> + description:
> + Delay the DVP path clock input to align the sampling phase, only valid
> + in dual edge sampling mode.
> +
> + iommus:
> + maxItems: 1
> +
> + resets:
> + items:
> + - description: ARST
> + - description: HRST
> + - description: DRST
> + - description: PRST
> + - description: IRST
> +
> + reset-names:
> + items:
> + - const: arst
> + - const: hrst
> + - const: drst
> + - const: prst
> + - const: irst
> +
> + rockchip,grf:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Phandle to general register file used for video input block control.
> +
> + power-domains:
> + maxItems: 1
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port at 0:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description: input port on the parallel interface
What about the CSI-2 interface?
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + bus-type:
> + enum: [5, 6]
> +
> + required:
> + - bus-type
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/rk3568-cru.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/power/rk3568-power.h>
> + #include <dt-bindings/media/video-interfaces.h>
> +
> + parent {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + vicap: video-capture at fdfe0000 {
> + compatible = "rockchip,rk3568-vicap";
> + reg = <0x0 0xfdfe0000 0x0 0x200>;
> + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
> + assigned-clocks = <&cru DCLK_VICAP>;
> + assigned-clock-rates = <300000000>;
> + clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>,
> + <&cru DCLK_VICAP>, <&cru ICLK_VICAP_G>;
> + clock-names = "aclk", "hclk", "dclk", "iclk";
> + iommus = <&vicap_mmu>;
> + power-domains = <&power RK3568_PD_VI>;
> + resets = <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>,
> + <&cru SRST_D_VICAP>, <&cru SRST_P_VICAP>,
> + <&cru SRST_I_VICAP>;
> + reset-names = "arst", "hrst", "drst", "prst", "irst";
> + rockchip,grf = <&grf>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + vicap_dvp: port at 0 {
> + reg = <0>;
> +
> + vicap_dvp_input: endpoint {
> + bus-type = <MEDIA_BUS_TYPE_BT656>;
> + bus-width = <16>;
> + pclk-sample = <MEDIA_PCLK_SAMPLE_DUAL_EDGE>;
> + remote-endpoint = <&it6801_output>;
> + };
> + };
> +
> + vicap_mipi: port at 1 {
> + reg = <1>;
> + };
> + };
> + };
> +
> + vicap_mmu: iommu at fdfe0800 {
> + compatible = "rockchip,rk3568-iommu";
Not part of this binding, so drop this node.
> + reg = <0x0 0xfdfe0800 0x0 0x100>;
> + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>;
> + clock-names = "aclk", "iface";
> + #iommu-cells = <0>;
> + power-domains = <&power RK3568_PD_VI>;
> + rockchip,disable-mmu-reset;
> + };
> + };
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 1138c8858bc7..8dbeb2927a08 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -20223,6 +20223,7 @@ M: Michael Riesch <michael.riesch at wolfvision.net>
> L: linux-media at vger.kernel.org
> S: Maintained
> F: Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
> +F: Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml
>
> ROCKCHIP CRYPTO DRIVERS
> M: Corentin Labbe <clabbe at baylibre.com>
>
> --
> 2.34.1
>
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