[PATCH v2 13/15] arm64: dts: imx8mm-phycore-som: Add overlay for rproc

Shawn Guo shawnguo2 at yeah.net
Sun Dec 29 20:17:52 PST 2024


On Mon, Dec 02, 2024 at 08:20:50AM +0100, Andrej Picej wrote:
> From: Dominik Haller <d.haller at phytec.de>
> 
> Adds a devicetree overlay containing reserved memory regions used
> for intercore communication between A53 and M4 cores.
> 
> Signed-off-by: Dominik Haller <d.haller at phytec.de>
> Signed-off-by: Andrej Picej <andrej.picej at norik.com>
> ---
> Changes in v2:
>  - no change.
> ---
>  arch/arm64/boot/dts/freescale/Makefile        |  2 +
>  .../dts/freescale/imx8mm-phycore-rpmsg.dtso   | 55 +++++++++++++++++++
>  2 files changed, 57 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso
> 
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index 99be36a04db9..5bc083a7b778 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -125,9 +125,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb
>  
>  imx8mm-phyboard-polis-peb-av-10-dtbs += imx8mm-phyboard-polis-rdk.dtb imx8mm-phyboard-polis-peb-av-10.dtbo
>  imx8mm-phyboard-polis-peb-eval-01-dtbs += imx8mm-phyboard-polis-rdk.dtb imx8mm-phyboard-polis-peb-eval-01.dtbo
> +imx8mm-phycore-rpmsg-dtbs += imx8mm-phyboard-polis-rdk.dtb imx8mm-phycore-rpmsg.dtbo
>  
>  dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-peb-av-10.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-peb-eval-01.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx8mm-phycore-rpmsg.dtb
>  
>  dtb-$(CONFIG_ARCH_MXC) += imx8mm-phygate-tauri-l.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mm-prt8mm.dtb
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso b/arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso
> new file mode 100644
> index 000000000000..0c61946f0cf8
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso
> @@ -0,0 +1,55 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2024 PHYTEC Messtechnik GmbH
> + * Author: Dominik Haller <d.haller at phytec.de>
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/clock/imx8mm-clock.h>
> +
> +&{/} {
> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;

I'm getting this:

arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso:16.3-10: Warning (ranges_format): /fragment at 0/__overlay__/reserved-memory:ranges: empty "ranges" property but its #size-cells (2) differs from /fragment at 0/__overlay__ (1)
arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso:13.18-43.4: Warning (avoid_default_addr_size): /fragment at 0/__overlay__/reserved-memory: Relying on default #address-cells value
arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso:13.18-43.4: Warning (avoid_default_addr_size): /fragment at 0/__overlay__/reserved-memory: Relying on default #size-cells value

Shawn

> +
> +		m4_reserved: m4 at 80000000 {
> +			reg = <0 0x80000000 0 0x1000000>;
> +			no-map;
> +		};
> +
> +		vdev0vring0: vdev0vring0 at b8000000 {
> +			reg = <0 0xb8000000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		vdev0vring1: vdev0vring1 at b8008000 {
> +			reg = <0 0xb8008000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		rsc_table: rsc_table at b80ff000 {
> +			reg = <0 0xb80ff000 0 0x1000>;
> +			no-map;
> +		};
> +
> +		vdevbuffer: vdevbuffer at b8400000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0 0xb8400000 0 0x100000>;
> +			no-map;
> +		};
> +	};
> +
> +	core-m4 {
> +		compatible = "fsl,imx8mm-cm4";
> +		clocks = <&clk IMX8MM_CLK_M4_DIV>;
> +		mboxes = <&mu 0 1
> +			&mu 1 1
> +			&mu 3 1>;
> +		mbox-names = "tx", "rx", "rxdb";
> +		memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>;
> +		syscon = <&src>;
> +	};
> +};
> -- 
> 2.34.1
> 




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