[PATCH V2 04/46] arm64/sysreg: Update register fields for TRBIDR_EL1

[Eric Auger]

Hi Anshuman

On 12/10/24 06:52, Anshuman Khandual wrote:
> This adds register fields for TRBIDR_EL1 as per the definitions based
> on DDI0601 2024-09.
> 
> Cc: Catalin Marinas <catalin.marinas at arm.com>
> Cc: Will Deacon <will at kernel.org>
> Cc: Mark Brown <broonie at kernel.org>
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-kernel at vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual at arm.com>
> ---
>  arch/arm64/tools/sysreg | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 59351931d907..10b1a0998d99 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -3295,13 +3295,24 @@ Field	31:0	TRG
>  EndSysreg
>  
>  Sysreg	TRBIDR_EL1	3	0	9	11	7
> -Res0	63:12
> +Res0	63:48
> +Field	47:32	MaxBuffSize
> +Res0	31:16
> +UnsignedEnum	15:12	MPAM
> +	0b0000	NI
> +	0b0001	PMG
Out of curiosity how did you choose the PMG terminology?
I see "MPAM implemented by the Trace Buffer Unit, using default PARTID
and PMG values in External mode". Wouldn't be TBU more meaningful?

Eric
> +	0b0010	IMP
> +EndEnum
>  Enum	11:8	EA
>  	0b0000	NON_DESC
>  	0b0001	IGNORE
>  	0b0010	SERROR
>  EndEnum
> -Res0	7:6
> +UnsignedEnum 7:6	AddrMode
> +	0b00	VIRT_PHYS
> +	0b01	VIRT_ONLY
> +	0b10	PHYS_ONLY
> +EndEnum
>  Field	5	F
>  Field	4	P
>  Field	3:0	Align