[PATCH v6 08/16] drm/rockchip: vop2: Support 32x8 superblock afbc
Andy Yan
andyshrk at 163.com
Mon Dec 16 16:41:24 PST 2024
Hi Daniel,
At 2024-12-16 21:06:07, "Daniel Stone" <daniel at fooishbar.org> wrote:
>Hi Andy,
>
>On Sat, 14 Dec 2024 at 08:18, Andy Yan <andyshrk at 163.com> wrote:
>> This is the only afbc format supported by the upcoming
>> VOP for rk3576.
>>
>> Add support for it.
>
>Out of interest, how was this tested? There is no 32x8 modifier in the
>format list in format_modifiers_afbc[], so it seems like it shouldn't
>be possible to get a 32x8 buffer on a plane at all.
The 32x8 modifier added in PATCH 16/16:
+/* used from rk3576, afbc 32*8 half mode */
+static const uint64_t format_modifiers_rk3576_afbc[] = {
+ DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_32x8 |
+ AFBC_FORMAT_MOD_SPLIT),
+
I write an ovltest[0] tool which can take linear/AFBC rgb/yuv data from a file, then
commit to drm driver, I use this tool for most basic format test.
But when tested on weston, I found that weston does not use the AFBC format for display,
don't know why.
>
>You can use the drm_info utility from
>https://gitlab.freedesktop.org/emersion/drm_info to validate that the
>list of supported formats/modifiers for each plane matches your
>expectation.
I think this is similar to what modetest dump:
38 0 0 0,0 0,0 0 0x00000001
formats: XR30 XB30 AR30 AB30 XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16 NV12 NV21 NV16 NV61 NV24 NV42 NV15 NV20 NV30
props:
8 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 0
30 IN_FORMATS:
flags: immutable blob
blobs:
value:
01000000000000001500000018000000
09000000700000005852333058423330
41523330414233305852323441523234
58423234414232345247323442473234
52473136424731364e5631324e563231
4e5631364e5636314e5632344e563432
4e5631354e5632304e56333000000000
ff0f0000000000000000000000000000
2200000000000008ff0f000000000000
00000000000000006200000000000008
ff0f0000000000000000000000000000
3200000000000008ff0f000000000000
0000000000000000a200000000000008
ff0f0000000000000000000000000000
e200000000000008ff0f000000000000
0000000000000000b200000000000008
ff0f0000000000000000000000000000
f200000000000008ff0f000000000000
00000000000000007200000000000008
ffff1f00000000000000000000000000
0000000000000000
in_formats blob decoded:
XR30: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
XB30: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
AR30: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
AB30: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
XR24: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
AR24: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
XB24: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
AB24: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
RG24: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
BG24: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
RG16: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
BG16: ARM_BLOCK_SIZE=32x8,MODE=SPLIT(0x800000000000022) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE(0x800000000000062) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT(0x800000000000032) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|CBR(0x8000000000000a2) ARM_BLOCK_SIZE=32x8,MODE=SPLIT|SPARSE|CBR(0x8000000000000e2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|CBR(0x8000000000000b2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE|CBR(0x8000000000000f2) ARM_BLOCK_SIZE=32x8,MODE=YTR|SPLIT|SPARSE(0x800000000000072) LINEAR(0x0)
NV12: LINEAR(0x0)
NV21: LINEAR(0x0)
NV16: LINEAR(0x0)
NV61: LINEAR(0x0)
NV24: LINEAR(0x0)
NV42: LINEAR(0x0)
NV15: LINEAR(0x0)
NV20: LINEAR(0x0)
NV30: LINEAR(0x0)
[0]https://github.com/andyshrk/mesa-drm/blob/mydev/tests/ovltest/ovltest.c#L1167
>
>Cheers,
>Daniel
>
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