[PATCH] pwm: stm32: Add check for clk_enable()

[Uwe Kleine-König]

Hello,

On Sun, Dec 15, 2024 at 05:47:52PM -0500, Mingwei Zheng wrote:
> Add check for the return value of clk_enable() to catch the potential
> error.
> 
> Fixes: 19f1016ea960 ("pwm: stm32: Fix enable count for clk in .probe()")
> Signed-off-by: Mingwei Zheng <zmw12306 at gmail.com>
> Signed-off-by: Jiasheng Jiang <jiashengjiangcool at gmail.com>
> ---
>  drivers/pwm/pwm-stm32.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
> index b889e64522c3..b94d186e3c0c 100644
> --- a/drivers/pwm/pwm-stm32.c
> +++ b/drivers/pwm/pwm-stm32.c
> @@ -858,8 +858,11 @@ static int stm32_pwm_probe(struct platform_device *pdev)
>  	chip->ops = &stm32pwm_ops;
>  
>  	/* Initialize clock refcount to number of enabled PWM channels. */
> -	for (i = 0; i < num_enabled; i++)
> -		clk_enable(priv->clk);
> +	for (i = 0; i < num_enabled; i++) {
> +		ret = clk_enable(priv->clk);
> +		if (ret)
> +			return ret;
> +	}

I wondered for some time if we could still improve more here. If the
(say) second clk_enable() or devm_pwmchip_add() fails, the clk_enable()
calls are leaked. However disabling the clk also might have downsides
(as it might stop a running PWM). OTOH the only expected failure point
is the first clk_enable() as the following are just software operations
and devm_pwmchip_add() only fails on memory pressure. So proper cleanup
doesn't really matter.

So I think the patch is fine as is and I will apply it.

Best regards
Uwe
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