[PATCH 07/15] ARM: zynq: Add ethernet phy reset information to DT(zc702)

[Michal Simek]

Added phy reset gpio information for gem0.

Signed-off-by: Michal Simek <michal.simek at amd.com>
---

 arch/arm/boot/dts/xilinx/zynq-zc702.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/xilinx/zynq-zc702.dts b/arch/arm/boot/dts/xilinx/zynq-zc702.dts
index 424e78f6c148..975385f4ac01 100644
--- a/arch/arm/boot/dts/xilinx/zynq-zc702.dts
+++ b/arch/arm/boot/dts/xilinx/zynq-zc702.dts
@@ -79,6 +79,8 @@ &gem0 {
 	phy-handle = <&ethernet_phy>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_gem0_default>;
+	phy-reset-gpio = <&gpio0 11 0>;
+	phy-reset-active-low;
 
 	ethernet_phy: ethernet-phy at 7 {
 		reg = <7>;
-- 
2.43.0